Prof. Nunez-Yanez is a professor in hardware architectures for Machine Learning at Linköping University with over 20 years of experience in the design of high-performance embedded hardware. He holds a PhD in hardware-based parallel data compression from the University of Loughborough, UK, with three patents awarded on the topic of high-speed parallel data compression.

Previously to joining Linköping University he was a reader (associate professor) at Bristol University, UK. He spent a few years working in industry at ST Micro (Milan), ARM (Cambridge) and Sensata Systems (Swindon) with Marie Curie and Royal Society fellowships.

His main area of expertise is in the design of hardware architectures and heterogenous systems for signal processing and machine learning with a focus on run-time adaptation, high-performance via parallelism and energy-efficiency.

• In 2021-2022 he was an international Leverhulme trust fellow working with partners at Universidad Politecnica de Madrid, Spain on reconfigurable hardware for inference and training at the edge.
• In 2020-2021 he was a Royal Society industry fellow with Sensata systems (UK) and ETA Compute (US) working on low-power subthreshold processors for machine intelligence at the network edge.
• In 2011 he was a Royal Society industry research fellow at ARM Ltd, Cambridge, UK working on high-level modelling of the energy consumption of heterogeneous many-core systems.
• In 2006-2007 he was a Marie Curie research fellow at ST Microelectronics, Milan, Italy working on the automatic design of accelerators for video processing and arithmetic coding compression engines.
• He has obtained significant funding both as PI and Co-I both with academic and industry partners such as Sensata Systems, European Space Agency, DSTL, Qioptiq, ST, ARM, Imagination, Xilinx and Altera (now Intel).
• His academic publications in the area of energy proportional computing with FPGA devices have won best paper awards in the Adaptive Hardware Systems (AHS) conferences sponsored by ESA/NASA in 2014 and the Adaptive Reconfigurable Computing (ARC) conference in 2016. He has published over 140 journal and conference publications and perform consultancy services in the area of lossless data compression and FPGA technology deployment and optimization.
• He is a member of the Royal society Grants Board, EPSRC college and Marie curie Alumni association.
• He has supervised 20 PhD students in the field of microelectronics hardware design and embedded systems and between 2012-2021 he was the program director of the AMSE (Advanced Microelectronics Systems Engineering) at Bristol University growing the program by a factor of 4x.

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Research and additional information at

https://eejlny.github.io/index.html

Teaching;

TSEA44 Computer Hardware - a System on Chip
TSIU03 - System Design

PhD co-supervision:

Olle Hansson

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