This research aims to improve the traditional frequency synthesizer architecture, using advanced calibration routines, improved modeling and noise suppression techniques such as sub-sampling. The aim is to lower the noise level of the synthesizer, thereby improving the performance of the entire system.
The future information society will intensively use digital and wireless technologies. The knowledge generated from this study contributes not only to the research community but also to new product development. Moreover, it contributes to courses and labs developed for undergraduate students interested in radio frequency circuit and system designs.